[Letux-kernel] x1600: how RAM size is determined

Paul Boddie paul at boddie.org.uk
Sat Mar 2 19:01:08 CET 2024

On Saturday, 2 March 2024 18:35:17 CET H. Nikolaus Schaller wrote:
> The chip type is logged to the console by SPL.
> For the x1600 (not x1600e) case this contains a record with .h.id =
> 0x0000001b for some 32 MB RAM.

Without looking into any code, I notice that the DDR configure register (DCFG) 
has fields for the row and column address widths:

<29:27> ROW1
<26:24> COL1

<13:11> ROW0
<10:8>  COL0

I can imagine that something might need to be written to these fields. If it 
is that value of 0x1b, then it might correspond to 0b011011, or ROW=0b11 and 
COL=0b11, which could then mean a 15-bit row address and an 11-bit column 
address. But that would yield a 26-bit combined address (or 64MB).

Meanwhile, for reference, the processor identifier for the X1600 is described 
as follows:

"2.2 PRID of X1600-CPU
Processor ID register (CP0 Register 15, select 0) in XBurst CPUs is a read-
only register being used to identify implementation detail of each SOC's CPU. 
Please refer to the programming manual of XBurst CPU for detail of the 
register. For X1600, its value is 0x00D0000"

I'm not sure if I really have any answers here!


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