[Letux-kernel] X1600 / LX16 support - here: adding MMC - MAJOR BREAKTHROUGH

H. Nikolaus Schaller hns at goldelico.com
Tue Feb 13 18:02:13 CET 2024



> Am 13.02.2024 um 15:27 schrieb H. Nikolaus Schaller <hns at goldelico.com>:
> 
> 
> 
>> Am 13.02.2024 um 12:28 schrieb Paul Boddie <paul at boddie.org.uk>:
>> 
>> On Tuesday, 13 February 2024 10:22:29 CET H. Nikolaus Schaller wrote:
>>> 
>>>> Anyway, feel free to take a look.
>>> 
>>> Maybe the push did fail or have you pushed elsewhere?
>> 
>> Yes, I forgot to push, so I have done so now.
> 
> Good news: works for me!
> 
> Some observed side-effects:
> 
> a) SD card speed reported by hdparm is now slower (37.56 MB/s -> 22.33 MB/s)
> b) boot process feels slower than before (have not used a stopwatch and OST is still broken)
> c) kernel got stuck with mmc1 still at 5 MHz; changing to 50 MHz as well made mmc1 work
> d) an SDHC card reports also 22.32 MB/sec and a very old 512 MB SD card (from Openmoko Freerunner) reports 7.71 MB/s
> 
> which indicates that we were overclocking something because of wrong divisor calculations.
> 
> Unfortunately it does not solve magically the UART issue. Which must be quite
> fundamental since UART is initialized very early.
> 
> So we know about these issues:
> 1. UART
> 2. TCU: "Set X1600-specific clock event flag." should be only x1600

likely needs an additional bit flag and specific

static const struct ingenic_soc_info x1600_soc_info = {

I have attached a link to the patch which seems to work equally well.
It should be squashed with "Set X1600-specific clock event flag."
before backporting to the letux/x1600 feature branches.

This is not easy as this is tied to how we distinguish jz4730 and others.
So it can likey not stand alone as a patch for upstreaming because it
is too much mixed with letux/jz4730.

> 3. OST ticks only once

> 4. gpio-buttons report only once
> 5. /proc/interrupts shows only one interrupt per press-release cycle for gpio-buttons
>  (I'd assume a "both edge" interrupt butmay be wrong how the driver works)

I have looked a little into the gpio_keys driver and it uses

hrtimer_init(&bdata->debounce_timer,
    CLOCK_REALTIME, HRTIMER_MODE_REL);

and

irqflags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;

Both may be broken (and HR timers are very likely broken as a result of
OST malfunction like it was on tje jz4730).

> 6. no power-controller (should likely be part of the RTC driver)
> 7. no RTC driver

x1600 has		compatible = "ingenic,rtc-x1600";
x1000 has 		compatible = "ingenic,x1000-rtc", "ingenic,jz4780-rtc";
x1830 has		compatible = "ingenic,x1830-rtc", "ingenic,jz4780-rtc";

and addresses are identical. All of them use the same driver
drivers/rtc/rtc-jz4740.c with no specialization for x1000 or jz4780.

So it might be as simple as adding "ingenic,jz4780-rtc".

But we lack a clocks / clock-names entry in x1600.dtsi. So I copied the
tcu clock definitions (see attached patch).

This makes me see:

[    0.000200] jz4740-rtc 10003000.rtc: registered as rtc0
[    0.000200] jz4740-rtc 10003000.rtc: hctosys: unable to read the hardware clock

root at letux:~# hwclock 
Thu Jan  1 00:01:02 1970  -1.765226 seconds
root at letux:~# 

But

root at letux:~# reboot
...
[info] Will now restart.
[    0.000200] reboot: Restarting system
[    0.000200] Reboot failed -- System halted

On the other hand, poweroff works now! Powers off the whole board (and
attached RasPi hat).

So we can rewrite our issue list to

6&7. reboot not working

> 8. no SPI driver
> 9. no USB (PHY) driver
> 10. shadow gpio registers do not work (this invisible to user-space)
> 11. anything else?
> 
> BR and thanks,
> Nikolaus
> 

I have also pushed everything as work-x1600-v5.

BR,
Nikolaus

https://git.goldelico.com/?p=letux-kernel.git;a=blobdiff;f=drivers/clocksource/ingenic-timer.c;h=dd7f5953103384af33caff094d36c0b7a62abb4d;hp=3e6037093e917c98f67fc8a9975218cf8d6f666f;hb=7fd5c1c19301337eee9bcb3dc38ec44718bcaff9;hpb=e50e9c385fef5aa04048688689d1d2421ec893a2

https://git.goldelico.com/?p=letux-kernel.git;a=blobdiff;f=arch/mips/boot/dts/ingenic/x1600.dtsi;h=57ccc3455688f6d85b62b401e141e4daef607922;hp=8932d37a8f0609122328722f8a1c0bca3ddd1f51;hb=e50e9c385fef5aa04048688689d1d2421ec893a2;hpb=a04fa519e88d2daf36dd539ce6e230e295971bfb




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