[Letux-kernel] X1600 / LX16 support - here: adding MMC

H. Nikolaus Schaller hns at goldelico.com
Sat Feb 10 11:11:40 CET 2024


Hi all,

> Am 09.02.2024 um 22:59 schrieb Andreas Kemnade <andreas at kemnade.info>:
> 
>> What I have as a theory is that the clocks are wrong and outside of specs. Some SD card
>> and some x1600 MSC may handle this well - and in some cases not.
>> 
> well, what I know about clocks:
> date
> shows something incrementing in a same way.
> the [....] in console do only increment in the beginning, and now I have suddenly seen 0.000193.

Yes, that is some bug in the OST (Operating System Timer?) driver which is not directly related to the CGU (Clock and Gate Unit?).

Not having that running may have a minor influence on the MMC, but I am not sure it is.
Basically it is the foundation to get nanoseconds precision used by the HRT mechanism of the kernel:

https://docs.kernel.org/timers/hrtimers.html

and if I remember correctly the kernel log reads out the underlying timer
counter every now and then to derive these time stamps.

> 
> if that helps:
> from debugfs (/sys/kernel/debug/clk/clk_summary):
> 
>                                 enable  prepare  protect                                duty  hardware                            connection
>   clock                          count    count    count        rate   accuracy phase  cycle    enable   consumer                         id
> ---------------------------------------------------------------------------------------------------------------------------------------------

Oh, great!

I have done the same on the 5.10.y kernel. Unfortunately the table has less
columns and the contents are differently sorted. And the clocks are named
differently. So a simple "diff" doesn't help.

Attached is the cleaned up 6.8 and the 5.10 version.

Maybe Paul knows at a glance where to look at. I have seen msc0/msc1 in
both but they are different.

But I think we should be cautious about the values in the 6.8 table.
Most likely they are derived by back-calculating the clock rates from
register settings. And if that formula is wrong the values do not
correspond to the real clock frequencies. And during setting the
clocks, the inverse calculation may be equally wrong and the readback
is still reasonable...

BR,
Nikolaus

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