[Letux-kernel] Letux/Alpha 400: small progress with sound

[H. Nikolaus Schaller]

Hi Paul,

> Am 28.04.2021 um 21:39 schrieb Paul Boddie <paul at boddie.org.uk>:
> 
> On Wednesday, 28 April 2021 20:19:15 CEST H. Nikolaus Schaller wrote:
>> 
>> I have hacked some ioremap() into jz4740_i2s_trigger() to be able to modify
>> pinctrl on the fly and read the gpio bits directly.
>> 
>> There is clock activity on both BITCLK and SYNC obviously coming from the
>> codec. And switching to ping function 0x2 makes these pins an output.
>> 
>> So I think we can rule out codec and pinctrl problems as the main blocking
>> point for completely stuck communication. It still may happen that there is
>> no sound if we fix that but aplay Front_Center.wav should finish playing
>> after ca. 3 seconds.
>> 
>> There remains only the AC97/I2S driver as the location of the issue.
> 
> I would have to look at it properly to have an opinion about it. Is there some 
> DMA involvement in this as well?

Yes... But it looks as if the I2S interface isn't properly initialized and therefore
gets stuck. No interrupt, no timeout no anything. Just waiting after setting up
everything. A register dump seems to indicate that the TX FIFO is being filled.
So maybe even DMA might work in this case but I can't know...

What I found is that there is very special code in the old driver:

	https://git.goldelico.com/?p=letux-kernel.git;a=blob;f=sound/soc/jz4740/jz4740-i2s.c;h=c58d9c3c844d242da1a8d357270eec87197b385c;hb=86df48ade42a3e852b10b26f11676da0e8c13ccc#l200

It does some initialization, then a mdelay, a reset and the same again...

But I can't find anything similar here:

	https://elixir.bootlin.com/linux/latest/source/sound/soc/jz4740/jz4740-i2s.c#L416

Here, it simply sets the reset bit and writes the new config. Assuming that the
controller reset can be done in one processor write cycle.

Maybe the jz4730 hardware needs more time to reset and hence setting the config
is lost.

But I can't write it by devmem2 either. devmem2 tells that it reads back the right
value but a second devmem has lost the bits...

Another idea is that the I2S module is not clocked properly.

>> 
>> Modifying code isn't difficult. We already have a DT compatible for
>> jz4730-i2s and a ->version field in the device struct. Small differences
>> are already handled for jz4760 and jz4770 by this mechanism.
> 
> Maybe I should take a closer look. I have been slowly working back towards the 
> Minibook in another project of mine, but this has been proceeding rather 
> slowly.

:) My work had also stalled for a while...

> One thing that will be necessary will be an investigation of DMA 
> beyond the simple memory-to-memory transfers that I tested, and that might be 
> informative for both the MMC and I2S peripherals.

That is exactly my plan. To debug I2S + DMA until it works. This can be easily
done from user-space on a booted machine. Then we can try to switch MMC to DMA.

BR,
Nikolaus