[Letux-kernel] [PATCH 07/20] fixup! Add clock driver for the JZ4730.

[Lubomir Rintel]

This fixes the WDT clock:

1.) Rename the "ext/128" clock.
    I think the slash can't be used because it's gonna mess something in
    sysfs or something.

2.) Fix the WDT clock name
    Copy & paste error I suppose.

3.) Order the child clock after the parent.
    The CGU driver registers the clocks in order the is determined by
    the DT clock ids.

Signed-off-by: Lubomir Rintel <lkundrak at v3.sk>
---
 drivers/clk/ingenic/jz4730-cgu.c       | 4 ++--
 include/dt-bindings/clock/jz4730-cgu.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/ingenic/jz4730-cgu.c b/drivers/clk/ingenic/jz4730-cgu.c
index da52062263b6f..3a775906f7724 100644
--- a/drivers/clk/ingenic/jz4730-cgu.c
+++ b/drivers/clk/ingenic/jz4730-cgu.c
@@ -201,13 +201,13 @@ static const struct ingenic_cgu_clk_info jz4730_cgu_clocks[] = {
 	},
 
 	[JZ4730_CLK_EXT_128] = {
-		"ext/128", CGU_CLK_FIXDIV,
+		"ext_div128", CGU_CLK_FIXDIV,
 		.parents = { JZ4730_CLK_EXT, -1, -1, -1 },
 		.div = { 128 },
 	},
 
 	[JZ4730_CLK_WDT] = {
-		"uhc", CGU_CLK_MUX,
+		"wdt", CGU_CLK_MUX,
 		.parents = { JZ4730_CLK_EXT_128, JZ4730_CLK_RTC, -1, -1 },
 		.mux = { CGU_REG_OCR, 8, 1 },
 	},
diff --git a/include/dt-bindings/clock/jz4730-cgu.h b/include/dt-bindings/clock/jz4730-cgu.h
index c946ef2232244..2dbaca523326e 100644
--- a/include/dt-bindings/clock/jz4730-cgu.h
+++ b/include/dt-bindings/clock/jz4730-cgu.h
@@ -41,7 +41,7 @@
 #define JZ4730_CLK_UART3	27
 #define JZ4730_CLK_I2C		28
 #define JZ4730_CLK_TCU		29
-#define JZ4730_CLK_WDT		30
-#define JZ4730_CLK_EXT_128	31
+#define JZ4730_CLK_EXT_128	30
+#define JZ4730_CLK_WDT		31
 
 #endif /* __DT_BINDINGS_CLOCK_JZ4730_CGU_H__ */
-- 
2.28.0