[Letux-kernel] jz4780 read out LCDC setup for HDMI

H. Nikolaus Schaller hns at goldelico.com
Fri Jun 5 07:17:27 CEST 2020


Hi Paul,

> Am 04.06.2020 um 19:29 schrieb Paul Boddie <paul at boddie.org.uk>:
> 
> On Thursday 4. June 2020 17.18.09 H. Nikolaus Schaller wrote:
>> 
>> I have booted the latest letux-5.7 and now, the lcdc got initialized!
>> So maybe something has improved in the DRM subsystem without our activity.
>> 
>> root at letux:~# cat /sys/kernel/debug/regmap/13050000.lcdc0/registers
>> 00: 00f00840
> 
> This is the configuration register, set up fairly normally.
> 
>> 04: 00000003
>> 08: 0000000d
> 
> These are the sync pulse definitions.
> ...


Still there are big differences between the 3.0.8 kernel and the 5.7
for the same hdmi monitor.

diff hdmi-3.0.8.txt hdmi-5.7.txt | fgrep JZ_REG
< 0x13050000 12f00440 JZ_REG_LCD_CFG
< 0x13050004 00000005 JZ_REG_LCD_VSYNC
< 0x13050008 0000002c JZ_REG_LCD_HSYNC
< 0x1305000c 08980465 JZ_REG_LCD_VAT
< 0x13050010 00c00840 JZ_REG_LCD_DAH
< 0x13050014 00290461 JZ_REG_LCD_DAV
> 0x13050000 00f00840 JZ_REG_LCD_CFG
> 0x13050004 00000003 JZ_REG_LCD_VSYNC
> 0x13050008 0000000d JZ_REG_LCD_HSYNC
> 0x1305000c 0520026e JZ_REG_LCD_VAT
> 0x13050010 011b051b JZ_REG_LCD_DAH
> 0x13050014 0014026c JZ_REG_LCD_DAV
< 0x13050030 4000080d JZ_REG_LCD_CTRL
< 0x13050034 00000024 JZ_REG_LCD_STATE
> 0x13050030 24002008 JZ_REG_LCD_CTRL
> 0x13050034 00000004 JZ_REG_LCD_STATE

>> Main difference for the PHY seems to be in the audio area, but there
>> are also some HDMI_IH, HDMI_VP and HDMI_FC registers where I don't
>> have any idea what they are about.
> 
> IH is interrupt handling, VP is video packetization and FC is frame composer. 
> Although the latter two are not entirely self-explanatory, I now have some 
> idea of what they do.

I have now also studied the differences in the HDMI_PHY registers and there
are some:

< 0x1018c000 000000ce HDMI_PHY_CONF0
> 0x1018c000 0000000e HDMI_PHY_CONF0
< 0x1018c018 000000f1 HDMI_PHY_MASK0
< 0x1018c01c 000000f1 HDMI_PHY_POL0
> 0x1018c018 00000001 HDMI_PHY_MASK0
> 0x1018c01c 00000000 HDMI_PHY_POL0

So there is different CONF. And what I have found is a patch like
this:

https://lists.denx.de/pipermail/u-boot/2012-October/136234.html

where people set the HDMI_PHY_CONF0_PDZ_MASK and HDMI_PHY_CONF0_ENTMDS_MASK
like I did find with the 3.0.8 kernel but not with 5.7.

Also the MASK (lane mask?) and POL (polarity?) differ.

So we may not only have a problem with initializing the LCDC but also the
HDMI PHY.

I am tempted to try to write all the 3.0.8 register values through devmem2...
i.e. override the setup done by the kernel drivers.

But maybe I should study the TILCDC (BeagleBone) driver which seems to have
a comparable structure (except that it has no vblank). This might help to
better understand the (broken) call chain for initialization.

BR,
Nikolaus



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