[Letux-kernel] [PATCH 00/20] A bunch of JZ4730 fixups for letux-kernel

[Paul Boddie]

Nikolaus,

On Friday, 18 December 2020 10:19:14 CET H. Nikolaus Schaller wrote:
> 
> Mainly here are bigger diffs in gpio, almost none in dmac (since it is not
> used) and some in msc:
> 10021008

This is the clock rate setting which the new kernel has set to 0x6, meaning 
1/64 of the input clock, whereas the old kernel has it set to 0x0, meaning the 
same as the input clock.

Here, we might need to know what the input clock is set to, and this doesn't 
seem to be in the register dump. The CPM registers start at 0x10000000 with 
CFCR which contains the MSC bit (24) determining whether the input clock is 
24MHz or 16MHz. I can't imagine it being useful to divide this clock unless 
SDIO is being used.

At 0x10000020, MSCR contains the MSC clock gating bit (13) for the peripheral 
which must be clear for the clock to be propagated. Investigating this, my 
clock driver might be missing the multiplexer for CFCR.MSC, so I have attached 
a patch to remedy this.

> 1002102c
> 10021030

These are the command index and argument registers. I will aim to add more 
details to the MMC page in the coming days.

> BTW: thank you very much for your memory map in our wiki! I took base
> address and range from there to read out the gpio, msc, dmac sections. If
> anything else is missing it is just a matter of minutes to repeat.
> 
> So I think I have now a tool setup to compare working and work-in-progress
> kernels.

It should be helpful. Thanks for uploading some data, mostly to get me to 
think about the issues in a more structured way. Certainly, the fix I have 
made with my patch will be necessary, even if it isn't sufficient, to get this 
working.

Paul
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