[Letux-kernel] SMP issue between LX16 and LX20 found...

[Paul Boddie]

On Saturday, 14 June 2025 19:58:46 CEST H. Nikolaus Schaller wrote:
> 
> So we have the issue that on x1600, ingenic_ost_cevt_cb()
> breaks when doing ost->soc_info->version and the pointer
> ost->soc_info is "randomized". This means that ost = timer->ost
> memory area is overwritten by someone.
> 
> What is the easiest way to find out who overwrites this?

I think we need a good mental model of how this is supposed to work, which I 
don't think I have really focused on until now. It seems to me that both CPUs 
(processor cores) access the same physical memory range for the peripherals, 
so unless there is some kind of extra layer or duplicate sets of some 
peripherals, both CPUs are capable of accessing the same registers and 
operating on the same peripherals.

So, it seems desirable that only one CPU would set up any given peripheral. 
Structures allocated during this process would, of course, be accessible later 
by both CPUs, but they would only allocated once by a particular CPU. Once 
initialised, a given CPU might need to access a peripheral, perhaps in 
response to an interrupt, and this would need to be done without disruption 
from the other CPU.

Usually, people focus on things like locking primitives when discussing multi-
CPU support, which is obviously relevant, but what I am missing is the control 
over initialisation, whether it must be done using a single CPU, whether it 
could be distributed across both CPUs, and how this is controlled.

Paul