[Letux-kernel] Fwd: [PATCH 2/4] pinctrl: ingenic: add x1600 support
H. Nikolaus Schaller
hns at goldelico.com
Wed Feb 26 22:23:05 CET 2025
Hi Paul,
here is what I think needs to be changed (not yet compile or runtime tested):
drivers/pinctrl/pinctrl-ingenic.c | 28 +++++++++++++++-------------
1 file changed, 15 insertions(+), 13 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c
index 6a16729d0a235..ea9508fadfa51 100644
--- a/drivers/pinctrl/pinctrl-ingenic.c
+++ b/drivers/pinctrl/pinctrl-ingenic.c
@@ -2448,9 +2448,12 @@ static int x1600_pwm_pwm1_pins[] = { 0x41, };
static int x1600_pwm_pwm2_pins[] = { 0x42, };
static int x1600_pwm_pwm3_pins[] = { 0x58, };
static int x1600_pwm_pwm4_pins[] = { 0x59, };
-static int x1600_pwm_pwm5_pins[] = { 0x33, 0x5a, };
-static int x1600_pwm_pwm6_pins[] = { 0x29, 0x34, };
-static int x1600_pwm_pwm7_pins[] = { 0x2a, 0x35, };
+static int x1600_pwm_pwm5_b_pins[] = { 0x33, };
+static int x1600_pwm_pwm5_c_pins[] = { 0x5a, };
+static int x1600_pwm_pwm6_b_9_pins[] = { 0x29, };
+static int x1600_pwm_pwm6_b_20_pins[] = { 0x34, };
+static int x1600_pwm_pwm7_b_10_pins[] = { 0x2a, };
+static int x1600_pwm_pwm7_b_21_pins[] = { 0x35, };
static int x1600_mac_pins[] = {
0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c,
@@ -2458,10 +2461,6 @@ static int x1600_mac_pins[] = {
static int x1600_sfc_funcs[] = { 0, 0, 0, 0, 0, 0, 2, };
-static int x1600_pwm_pwm5_funcs[] = { 2, 1, };
-static int x1600_pwm_pwm6_funcs[] = { 1, 2, };
-static int x1600_pwm_pwm7_funcs[] = { 1, 2, };
-
static const struct group_desc x1600_groups[] = {
INGENIC_PIN_GROUP("uart0-data", x1600_uart0_data, 0),
INGENIC_PIN_GROUP("uart0-hwflow", x1600_uart0_hwflow, 0),
@@ -2508,9 +2507,12 @@ static const struct group_desc x1600_groups[] = {
INGENIC_PIN_GROUP("pwm2", x1600_pwm_pwm2, 0),
INGENIC_PIN_GROUP("pwm3", x1600_pwm_pwm3, 1),
INGENIC_PIN_GROUP("pwm4", x1600_pwm_pwm4, 1),
- INGENIC_PIN_GROUP_FUNCS("pwm5", x1600_pwm_pwm5, x1600_pwm_pwm5_funcs),
- INGENIC_PIN_GROUP_FUNCS("pwm6", x1600_pwm_pwm6, x1600_pwm_pwm6_funcs),
- INGENIC_PIN_GROUP_FUNCS("pwm7", x1600_pwm_pwm7, x1600_pwm_pwm7_funcs),
+ INGENIC_PIN_GROUP("pwm5-b", x1600_pwm_pwm5_b, 2),
+ INGENIC_PIN_GROUP("pwm5-c", x1600_pwm_pwm5_c, 1),
+ INGENIC_PIN_GROUP("pwm6-b9", x1600_pwm_pwm6, 1),
+ INGENIC_PIN_GROUP("pwm6-b20", x1600_pwm_pwm6, 2),
+ INGENIC_PIN_GROUP("pwm7-b10", x1600_pwm_pwm7, 1),
+ INGENIC_PIN_GROUP("pwm7-b21", x1600_pwm_pwm7, 2),
INGENIC_PIN_GROUP("mac", x1600_mac, 1),
};
@@ -2553,9 +2555,9 @@ static const char * const x1600_pwm1_groups[] = { "pwm1", };
static const char * const x1600_pwm2_groups[] = { "pwm2", };
static const char * const x1600_pwm3_groups[] = { "pwm3", };
static const char * const x1600_pwm4_groups[] = { "pwm4", };
-static const char * const x1600_pwm5_groups[] = { "pwm5", };
-static const char * const x1600_pwm6_groups[] = { "pwm6", };
-static const char * const x1600_pwm7_groups[] = { "pwm7", };
+static const char * const x1600_pwm5_groups[] = { "pwm5-b", "pwm5-c", };
+static const char * const x1600_pwm6_groups[] = { "pwm6-b9", "pwm6-b20", };
+static const char * const x1600_pwm7_groups[] = { "pwm7-b10", "pwm7-b21", };
static const char * const x1600_mac_groups[] = { "mac", };
> Anfang der weitergeleiteten Nachricht:
>
> Von: "H. Nikolaus Schaller" <hns at goldelico.com>
> Betreff: Aw: [Letux-kernel] [PATCH 2/4] pinctrl: ingenic: add x1600 support
> Datum: 26. Februar 2025 um 21:09:39 MEZ
> An: Paul Cercueil <paul at crapouillou.net>, Paul Boddie <paul at boddie.org.uk>
> Kopie: Rob Herring <robh at kernel.org>, Conor Dooley <conor+dt at kernel.org>, devicetree <devicetree at vger.kernel.org>, Linus Walleij <linus.walleij at linaro.org>, Linux Kernel Mailing List <linux-kernel at vger.kernel.org>, linux-mips at vger.kernel.org, linux-gpio at vger.kernel.org, Krzysztof Kozlowski <krzk+dt at kernel.org>, Discussions about the Letux Kernel <letux-kernel at openphoenux.org>, Tim Bysun <tim.bysun at ingenic.com>
> Antwort an: Discussions about the Letux Kernel <letux-kernel at openphoenux.org>
>
> Hi all,
>
>> Am 26.02.2025 um 20:42 schrieb H. Nikolaus Schaller <hns at goldelico.com>:
>>
>> Hi Paul,
>>
>>> Am 26.02.2025 um 19:43 schrieb Paul Cercueil <paul at crapouillou.net>:
>>>
>>> Hi Nikolaus, and everyone involved,
>>>
>>> Le mercredi 26 février 2025 à 18:16 +0100, H. Nikolaus Schaller a
>>> écrit :
>>>> From: Paul Boddie <paul at boddie.org.uk>
>>>>
>>>> Add support for the Lumissil/Ingenic X1600 SoC.
>>>>
>>>> It uses shadow registers to commit changes to multiple pinctrl
>>>> registers in parallel.
>>>>
>>>> Define specific Chip ID, register offsets, pin tables etc.
>>>>
>>>> Handling the unique X1600_GPIO_PU only for the x1600 but
>>>> not for x1830 and above must be carefully taken into account.
>>>>
>>>> Co-authored-by: Andreas Kemnade <andreas at kemnade.info>
>>>> Co-authored-by: H. Nikolaus Schaller <hns at goldelico.com>
>>>> Signed-off-by: Paul Boddie <paul at boddie.org.uk>
>>>> Signed-off-by: Andreas Kemnade <andreas at kemnade.info>
>>>> Signed-off-by: H. Nikolaus Schaller <hns at goldelico.com>
>>>> ---
>>>> drivers/pinctrl/pinctrl-ingenic.c | 242
>>>> +++++++++++++++++++++++++++++-
>>>> 1 file changed, 240 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/drivers/pinctrl/pinctrl-ingenic.c
>>>> b/drivers/pinctrl/pinctrl-ingenic.c
>>>> index bc7ee54e062b5..dfdc89ece9b8a 100644
>>>> --- a/drivers/pinctrl/pinctrl-ingenic.c
>>>> +++ b/drivers/pinctrl/pinctrl-ingenic.c
>>>>
>
> ...
>
>>>> +static int x1600_pwm_pwm0_pins[] = { 0x40, };
>>>> +static int x1600_pwm_pwm1_pins[] = { 0x41, };
>>>> +static int x1600_pwm_pwm2_pins[] = { 0x42, };
>>>> +static int x1600_pwm_pwm3_pins[] = { 0x58, };
>>>> +static int x1600_pwm_pwm4_pins[] = { 0x59, };
>>>> +static int x1600_pwm_pwm5_pins[] = { 0x33, 0x5a, };
>>>> +static int x1600_pwm_pwm6_pins[] = { 0x29, 0x34, };
>>>> +static int x1600_pwm_pwm7_pins[] = { 0x2a, 0x35, };
>>>
>>> Just a quick question about these ones: why are there 2 pins here? If
>>> you have the PWM5/6/7 function on two different pins then you should
>>> probably have two groups.
>>
>> I think they are added through INGENIC_PIN_GROUP_FUNCS()
>> to x1600_groups[].
>>
>> So the pins list is different from pwm0 to 4 which
>> uses INGENIC_PIN_GROUP().
>
> I have now checked with the programming manual.
>
> Yes, pwm5 to pwm7 can be pinmuxed to different pads,
> while pwm0 to pwm4 have only one option.
>
> E.g. pwm5: PC26 in function 1 or PB19 in function 2.
>
> This is simular to what we have with uart2-data-a and
> uart2-data-b.
>
> So I tend to agree that we need different pin groups
> ("pwm5-a", "pwm5-b") and no need to use INGENIC_PIN_GROUP_FUNCS().
>
> Maybe we didn't realize since we have not yet used PWM in
> any x1600 based device.
>
> ...
>
>>>> +static int x1600_pwm_pwm5_funcs[] = { 2, 1, };
>>>> +static int x1600_pwm_pwm6_funcs[] = { 1, 2, };
>>>> +static int x1600_pwm_pwm7_funcs[] = { 1, 2, };
>>>> +
>>>> +static const struct group_desc x1600_groups[] = {
>>>> + INGENIC_PIN_GROUP("uart0-data", x1600_uart0_data, 0),
>>>> + INGENIC_PIN_GROUP("uart0-hwflow", x1600_uart0_hwflow, 0),
>>>> + INGENIC_PIN_GROUP("uart1-data", x1600_uart1_data, 1),
>>>> + INGENIC_PIN_GROUP("uart1-hwflow", x1600_uart1_hwflow, 1),
>>>> + INGENIC_PIN_GROUP("uart2-data-a", x1600_uart2_data_a, 2),
>>>> + INGENIC_PIN_GROUP("uart2-data-b", x1600_uart2_data_b, 1),
>>>> + INGENIC_PIN_GROUP("uart3-data-b", x1600_uart3_data_b, 0),
>>>> + INGENIC_PIN_GROUP("uart3-data-d", x1600_uart3_data_d, 2),
>
> ...
>
>>>> + INGENIC_PIN_GROUP("pwm0", x1600_pwm_pwm0, 0),
>>>> + INGENIC_PIN_GROUP("pwm1", x1600_pwm_pwm1, 0),
>>>> + INGENIC_PIN_GROUP("pwm2", x1600_pwm_pwm2, 0),
>>>> + INGENIC_PIN_GROUP("pwm3", x1600_pwm_pwm3, 1),
>>>> + INGENIC_PIN_GROUP("pwm4", x1600_pwm_pwm4, 1),
>>>> + INGENIC_PIN_GROUP_FUNCS("pwm5", x1600_pwm_pwm5,
>>>> x1600_pwm_pwm5_funcs),
>>>> + INGENIC_PIN_GROUP_FUNCS("pwm6", x1600_pwm_pwm6,
>>>> x1600_pwm_pwm6_funcs),
>>>> + INGENIC_PIN_GROUP_FUNCS("pwm7", x1600_pwm_pwm7,
>>>> x1600_pwm_pwm7_funcs),
>>>> + INGENIC_PIN_GROUP("mac", x1600_mac, 1),
>>>> +};
>>>> +
>
> If Paul Boddie agrees, I will add it to the V2.
>
> BR and thanks,
> Nikolaus
>
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