[Letux-kernel] X1600 / LX16 support - here: adding MMC

H. Nikolaus Schaller hns at goldelico.com
Fri Feb 9 07:58:33 CET 2024

> Am 08.02.2024 um 16:29 schrieb H. Nikolaus Schaller <hns at goldelico.com>:
> Reasons for our issues could be:
> 1. clocks
> 2. DMA (if DMA used for single byte reads like the OCR?)
> 3. pinctrl (pullup/down?)
> 4. subtle msc controller differences to ingenic,jz4780-mmc (it was a pure assumption that they are the same based on same I/O address 0x13450000/0x13460000 and we have not yet checked)
> 5. something else (but what?)

I've compared the programming manuals (hypothesis 4.)

jz4780 has 3 MSC and x1600 has 2 but that is handled by DTS nodes.

Register names are the same.

MSC_STAT has 2 more bits on jz4780: SVS and AUTO_CMD23_DONE ("reserved and read 0" on x1600)
MSC_CLKRT (clock dividers) is the same
MSC_RESTO (reset timeout) is 32 bit on x1600 and 16 bit on jz4780 - default is 128 on both
MSC_RDTO (read timeout) is the same
MSC_BLKLEN the same
MSC_NOB the same
MSC_SNOB the same
MSC_IMASK jz4780: can mask SVS and AUTO_CMD23_DONE interrupts
	x1600 has additional DMA_DATA_DONE and WR_ALL_DONE interrupt mask
MSC MSC_IFLG same differences
MSC_CMD the same
MSC_ARG the same
MSC_RES the same
MSC_RXFIFO the same
MSC_TXFIFO the same
MSC_LPM (low power mode) the same
MSC_DMAC the same
MSC_DMANDA the same
MSC_DMADA the same
MSC_DMALEN the same
MSC_DMACMD the same
MSC_RTCNT the same
MSC_CTRL2 jz4780 has additional SVC bit (signal voltage change) and RST_EN (control a special reset pin)

CMD23 allows to specify the number of blocks in a pre-erase before writing (SET_WR_BLK_ERASE_COUNT) [1].
I guess the x1600 simply does this more automatically than the jz4780 or it is simply not documented.

So I see two candidates to inspect code:
a) interrupt masks/flags need to be handled a little differently (DMA_DATA_DONE)
b) control of RST_EN (x1600 has this bit and PM says "inner usage, keep to 1.") - so it might harm to modify this on x1600


[1]: https://www.sdcard.org/cms/wp-content/themes/sdcard-org/dl.php?f=Part1_Physical_Layer_Simplified_Specification_Ver6.00.pdf (Table 7-3)

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