[Letux-kernel] Letux/Alpha 400: small progress with sound - compare CI20 sound

H. Nikolaus Schaller hns at goldelico.com
Fri Apr 30 17:56:02 CEST 2021


Hi Paul,

> Am 30.04.2021 um 00:20 schrieb Paul Boddie <paul at boddie.org.uk>:
> 
> On
>> 
>> 
>> But it uses the internal codec:
>> 
>> 		codec: codec at 100200a4 {
>> 			compatible = "ingenic,jz4780-codec";
>> 			reg = <0x100200a4 0x8>;
>> 
>> 			clocks = <&cgu JZ4780_CLK_I2SPLL>;
>> 			clock-names = "i2s";

as written previously, I have found that I can't read/write the
codec registers of the jz4780. Most likely the codec clock is set up wrongly...

PM says:

	14.19 SYS_CLK turn-off and turn-on

	The main clock of CODEC is called SYS_CLK, which is generated in CPM module
	and called MCLK. During the SLEEP mode and the complete power-down mode,
	the main clock SYS_CLK may be stopped to reduce the power consumption t
	the leakage currents only. In other modes, the main clock SYS_CLK must not
	be stopped.

So referencing JZ4780_CLK_I2SPLL may be wrong...

But what I could not find yet is which clock the MCLK is. I only find a CIMMCLK
(camera). And PCMCLK (PCM).

It should be a 12 (or 13) MHz clock according to description of other registers.

Any ideas as you are a CGU specialist?

BR and thanks,
Nikolaus


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