[Letux-kernel] [PATCH 00/20] A bunch of JZ4730 fixups for letux-kernel
Paul Boddie
paul at boddie.org.uk
Fri Dec 25 00:55:53 CET 2020
On Wednesday, 23 December 2020 17:18:44 CET Paul Boddie wrote:
> On Wednesday, 23 December 2020 15:56:01 CET H. Nikolaus Schaller wrote:
> >
> > - date is counting in 1 second steps, so only the timing info in dmesg is
> > wrong (maybe the 1 second timer is ok, but the µs or ns count wrong)
>
> I will still take a look at the OST peripheral. I'm still not sure whether
> to keep making the TCU driver pretend that it has TCU timers, as is done
> now, or whether to support multiple OST timers instead. But the width of
> the timers will need to be configurable.
I had a look at this and saw that a more elegant way of organising this driver
might involve allowing the prescaler to be configured, at least if PCLK is
selected as the input clock. This should then permit an identical clock
configuration in the JZ4730 device tree to those used in other JZ-series
device trees, which might not have been compatible with the way the driver has
been organised (with separate, prescaled clocks) until now.
I don't know whether this patch would improve anything or not. It seems as if
the correct value is already set by the driver in the input clock field of the
OST's TCSR (timer control and status register): 5 if EXCLK is selected, which
is what the Mipsbook device tree indicates (JZ4730_CLK_EXCLK).
Anyway, I have provided this patch in case it might help in some way.
Potentially, if we change the assigned clock to JZ4730_CLK_PCLK, the timer
clocks will be adjustable, which might be what we are missing with regard to
the usability of these timers.
In any case, I hope this is helpful.
Paul
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