[Letux-kernel] [PATCH 00/20] A bunch of JZ4730 fixups for letux-kernel
H. Nikolaus Schaller
hns at goldelico.com
Mon Dec 21 09:25:38 CET 2020
Hi Paul,
> Am 21.12.2020 um 00:18 schrieb Paul Boddie <paul at boddie.org.uk>:
>
> On Sunday, 20 December 2020 23:13:17 CET H. Nikolaus Schaller wrote:
>>
>> Yes,
>> I was just writing a longer mail with my findings but here is the important
>> part.
>>
>> [ 0.047556] vcc: 3300 mV, enabled
>> [ 0.052047] reg-fixed-voltage regulator at 0: vcc supplying 3300000uV
>> [ 0.059335] ingenic_gpio_set: off=21, val=1
>> [ 0.046211] ingenic_gpio_set_value: offset=15, value=1
>
> This is PA15 (related to the DMA controller) being set to high.
well, offset does not seem to be the same as a pin number. Some functions
have both parameters.
And I print the pin numbers with %d while offsets with %x. So 0x15 == 21.
I should sed s/%x/0x%x/g ...
[ 0.173491] vcc: 3300 mV, enabled
[ 0.178551] reg-fixed-voltage regulator at 0: vcc supplying 3300000uV
[ 0.178895] ingenic_gpio_get_direction offset=21
[ 0.183747] ingenic_get_pin_config pin=21 reg=4
[ 0.171316] ingenic_gpio_set: off=21, val=1
[ 0.175709] ingenic_gpio_set_value: offset=0x15, value=0x1
[ 0.181407] ingenic_gpio_set_bit reg=0 offset=21 set=1
[ 0.186761] ingenic_gpio_direction_output offset=21 value=1
[ 0.175249] ingenic_pinmux_gpio_set_direction
[ 0.179843] pinctrl-ingenic 10010000.pin-controller: set pin PA21 to output
[ 0.187059] reg: 0x10010004 0x28200200
[ 0.190982] ingenic_config_pin: pin=21, reg=0x20 set=0
[ 0.179609] ingenic_config_pin: idx=0x15, offt=0x0
[ 0.184636] ingenic_config_pin: regmap update roff=0x20, bits=00200000 val=00000000
[ 0.192654] ingenic_config_pin: pin=21, reg=0x4 set=1
[ 0.180550] ingenic_config_pin: idx=0x15, offt=0x0
[ 0.185567] ingenic_config_pin: regmap update roff=0x4, bits=00200000 val=00200000
[ 0.193501] ingenic_config_pin_function: pin=21, reg=0x14:0x10 -> 0x14 value=0
[ 0.183695] ingenic_config_pin_function: idx=0x5, offt=0x1
[ 0.189427] ingenic_config_pin_function: regmap_update_bits roff=0x44, mask=0x00000c00 value=0x00000000
[ 0.199226] reg: 0x10010004 0x28200200
[ 0.185780] vmmc: 3300 mV, disabled
Sorry for the confusion.
>> After a while it builds up again to
>>
>> [ 0.197738] reg: 10010004: 08000200
>
> Right, so bit 21 is ultimately not set, and so PA21 is an input.
>
>> Maybe the regmap is broken...
>> Or some parallel process is writing to the wrong address.
>>
>> If it is something else it should show itself by different timing.
>> But that will really be hard to find without JTAG.
>>
>> A first check makes it appear to be reproducible between PA1 and PA2.
>>
>> I'll try to confirm in the next days.
>
>
> I can't immediately see anything that might reset the register amongst the
> operations performed here.
I have now added printk to *all* functions within pinctrl-ingenic
and here is what happens just before the "set pin PA2 to input":
[ 0.638371] reg: 0x10010004 0x28200200
[ 0.642322] irq_set_type offset=1 type=8
[ 0.646451] ingenic_gpio_set_bit reg=1 offset=4 set=0
[ 0.651747] ingenic_gpio_set_bits reg=1:28 -> 1 offset=24 value=0
[ 0.640306] reg: 0x10010004 0x00000000
[ 0.644265] ingenic_gpio_irq_enable
[ 0.647957] ingenic_gpio_set_bit reg=32 offset=1 set=1
[ 0.653310] ingenic_gpio_irq_unmask
[ 0.639223] ingenic_gpio_set_bit reg=32 offset=1 set=0
[ 0.644962] ingenic_gpio_irq_request
[ 0.648771] ingenic_pinmux_gpio_set_direction
[ 0.653356] pinctrl-ingenic 10010000.pin-controller: set pin PA2 to input
Looking into the code of irq_set_type() there is something suspect:
static void ingenic_gpio_set_bit(struct ingenic_gpio_chip *jzgc,
u8 reg, u8 offset, bool set)
...
static void irq_set_type(struct ingenic_gpio_chip *jzgc,
...
} else if (jzgc->jzpc->info->version == ID_JZ4730) {
ingenic_gpio_set_bit(jzgc, offset, JZ4730_GPIO_GPDIR, false);
ingenic_gpio_set_bits(jzgc, offset,
JZ4730_GPIO_GPIDUR, JZ4730_GPIO_GPIDLR,
(val2 ? 2 : 0) | (val1 ? 1 : 0));
return;
...
if (jzgc->jzpc->info->version >= ID_X1000) {
ingenic_gpio_shadow_set_bit(jzgc, reg2, offset, val1);
ingenic_gpio_shadow_set_bit(jzgc, reg1, offset, val2);
ingenic_gpio_shadow_set_bit_load(jzgc);
} else {
ingenic_gpio_set_bit(jzgc, reg2, offset, val1);
ingenic_gpio_set_bit(jzgc, reg1, offset, val2);
}
So for the jz4730 we pass the register number(s) as 3rd argument,
while for the other SoC we pass as 2nd. And offset is the other one.
What I don't understand is how this can wipe out the full register...
But I have tried to swap the offset behind the registers and the result is:
[ 2.539027] Waiting for root device /dev/mmcblk1p2...
[ 2.537757] mmc_gpio_get_ro
[ 2.540796] ingenic_gpio_get: off=2
[ 2.544487] ingenic_gpio_read_reg reg=0
[ 2.530991] ingenic_gpio_get_value: offset=0x2
[ 2.538372] mmc0: new high speed SDHC card at address 59b4
[ 2.531623] mmcblk0: mmc0:59b4 USD 7.51 GiB (ro)
[ 2.547466] mmcblk0: p1 p2
[ 3.337335] random: crng init done
Still stuck, but card and partitions are now detected! Yay!
It seems to report read-only (ro) but that is a different story (WP GPIO?).
It should not stop running the init process.
Patch attached.
BR,
Nikolaus
Register values are now:
[ 1.393813] jz4740-mmc 10021000.mmc: Ingenic SD/MMC card driver registered
[ 1.400959] jz4740-mmc 10021000.mmc: Using PIO, 4-bit mode
[ 1.406657] reg: cpm
[ 1.409038] reg: 10000000: 0d522220
[ 1.395200] reg: 10000004: 000000f8
[ 1.398907] reg: 10000008: 00000001
[ 1.402594] reg: 1000000c: 00000000
[ 1.406284] reg: 10000010: 5a000520
[ 1.409971] reg: 10000014: 00000000
[ 1.396111] reg: 10000018: 00000000
[ 1.399819] reg: 1000001c: 00150000
[ 1.403507] reg: 10000020: 00000000
[ 1.407195] reg: 10000024: 00000000
[ 1.410883] reg: 10000028: 00000003
[ 1.403588] reg: 1000002c: 00000003
[ 1.407299] reg: 10000030: 00000003
[ 1.410989] reg: 10000034: 00000000
[ 1.414677] reg: 10000038: 00000000
[ 1.418365] reg: 1000003c: 00000000
[ 1.404514] reg: 10000040: 00000000
[ 1.408220] reg: 10000044: 00000000
[ 1.411909] reg: 10000048: 00000000
[ 1.415592] reg: intc
[ 1.418063] reg: 10001000: 00001000
[ 1.421753] reg: 10001004: e01f3ffd
[ 1.407929] reg: 10001008: 00000000
[ 1.411639] reg: 1000100c: 00000000
[ 1.415328] reg: 10001010: 00000000
[ 1.419012] reg: ost
[ 1.421394] reg: 10002000: f7d8b303
[ 1.425082] reg: 10002004: f7d8b3ff
[ 1.416331] reg: 10002008: f7d8b3ff
[ 1.420045] reg: 1000200c: f7d8b3ff
[ 1.423733] reg: 10002010: 00008fff
[ 1.427423] reg: 10002014: 00005e98
[ 1.431111] reg: 10002018: f7d80025
[ 1.417259] reg: 1000201c: 00005e97
[ 1.420969] reg: 10002020: f7d8b3ff
[ 1.424659] reg: 10002024: f7d8b3ff
[ 1.428347] reg: 10002028: f7d8b3ff
[ 1.432036] reg: 1000202c: f7d8b3ff
[ 1.418177] reg: 10002030: 0000ffff
[ 1.421883] reg: 10002034: 00000678
[ 1.425573] reg: 10002038: f7d80045
[ 1.429262] reg: 1000203c: 0000d0d3
[ 1.432951] reg: 10002040: f7d8b3ff
[ 1.419091] reg: 10002044: f7d8b3ff
[ 1.422801] reg: 10002048: f7d8b3ff
[ 1.426489] reg: 1000204c: f7d8b3ff
[ 1.430177] reg: 10002050: ffffffff
[ 1.433867] reg: 10002054: ffffffff
[ 1.424797] reg: 10002058: ffff0005
[ 1.428509] reg: 1000205c: ffffffff
[ 1.432199] reg: 10002060: ffffffff
[ 1.435889] reg: 10002064: ffffffff
[ 1.439578] reg: 10002068: ffffffff
[ 1.425726] reg: 1000206c: ffffffff
[ 1.429435] reg: 10002070: ffffffff
[ 1.433125] reg: 10002074: ffffffff
[ 1.436814] reg: 10002078: ffffffff
[ 1.440503] reg: 1000207c: ffffffff
[ 1.426635] reg: rtc
[ 1.429038] reg: 10003000: 0000004d
[ 1.432726] reg: 10003004: c7f8de19
[ 1.436415] reg: 10003008: 2263d880
[ 1.440103] reg: 1000300c: 000b4482
[ 1.443785] reg: wdt
[ 1.428787] reg: 10004000: 00000000
[ 1.432504] reg: 10004004: ffffffdf
[ 1.436191] reg: 10004008: 00000000
[ 1.439880] reg: 1000400c: 00000000
[ 1.443564] reg: gpio
[ 1.446034] reg: 10010000: 5b9e12ff
[ 1.438461] reg: 10010004: 28200200
[ 1.442173] reg: 10010008: 00000000
[ 1.445862] reg: 1001000c: ffffff01
[ 1.449550] reg: 10010010: 55510000
[ 1.453240] reg: 10010014: 51100000
[ 1.439385] reg: 10010018: 00000000
[ 1.443093] reg: 1001001c: 00000000
[ 1.446781] reg: 10010020: 00000000
[ 1.450470] reg: 10010024: 00000000
[ 1.454158] reg: 10010028: 00000000
[ 1.440300] reg: 1001002c: 00000000
[ 1.444007] reg: 10010030: 2000007f
[ 1.447695] reg: 10010034: 00000000
[ 1.451385] reg: 10010038: 00000000
[ 1.455074] reg: 1001003c: ffffffff
[ 1.441218] reg: 10010040: 55555550
[ 1.444926] reg: 10010044: 512a5155
[ 1.448614] reg: 10010048: 00000000
[ 1.452303] reg: 1001004c: 00000000
[ 1.455990] reg: 10010050: 00000000
[ 1.447734] reg: 10010054: 00000000
[ 1.451444] reg: 10010058: 00000000
[ 1.455133] reg: 1001005c: 00000000
[ 1.458822] reg: 10010060: 1f421f1a
[ 1.462512] reg: 10010064: 20400000
[ 1.448661] reg: 10010068: 00000000
[ 1.452371] reg: 1001006c: fffffffa
[ 1.456059] reg: 10010070: 64005400
[ 1.459749] reg: 10010074: 00005555
[ 1.463436] reg: 10010078: 00000001
[ 1.449575] reg: 1001007c: 00000000
[ 1.453284] reg: 10010080: 00000000
[ 1.456971] reg: 10010084: 00000000
[ 1.460660] reg: 10010088: 00000000
[ 1.464348] reg: 1001008c: 00000000
[ 1.450490] reg: 10010090: 6000ffff
[ 1.454198] reg: 10010094: 00000000
[ 1.457887] reg: 10010098: 00000000
[ 1.461576] reg: 1001009c: 3fffffff
[ 1.465266] reg: 100100a0: 40000000
[ 1.451443] reg: 100100a4: 51555555
[ 1.455151] reg: 100100a8: 00000000
[ 1.458840] reg: 100100ac: 00000000
[ 1.462527] reg: 100100b0: 00000000
[ 1.466216] reg: 100100b4: 00000000
[ 1.452391] reg: 100100b8: 00000000
[ 1.456101] reg: 100100bc: 00000000
[ 1.459785] reg: msc
[ 1.462167] reg: 10021000: 00000000
[ 1.465854] reg: 10021004: 00000040
[ 1.469543] reg: 10021008: 00000006
[ 1.462698] reg: 1002100c: 00000000
[ 1.466411] reg: 10021010: 00000040
[ 1.470099] reg: 10021014: 0000ffff
[ 1.473789] reg: 10021018: 00000000
[ 1.477478] reg: 1002101c: 00000000
[ 1.463629] reg: 10021020: 00000001
[ 1.467336] reg: 10021024: 000000ff
[ 1.471023] reg: 10021028: 00000000
[ 1.474713] reg: 1002102c: 00000000
[ 1.478401] reg: 10021030: 00000000
[ 1.464545] reg: 10021034: 00001100
[ 1.468251] reg: 10021038: 00000000
[ 1.471939] reg: 1002103c: 00000000
[ 1.475622] reg: i2c
[ 1.478005] reg: 10042000: 0000007f
[ 1.481692] reg: 10042004: 00000001
[ 1.473429] reg: 10042008: 00000004
[ 1.477141] reg: 1004200c: 000000d0
[ 1.480828] reg: dmac
[ 1.483299] reg: 13020000: 00000000
[ 1.486986] reg: 13020004: 00000000
[ 1.490675] reg: 13020008: 00000000
[ 1.476855] reg: 1302000c: 00000000
[ 1.480565] reg: 13020010: 00000000
[ 1.484254] reg: 13020014: 00000000
[ 1.487941] reg: 13020018: 00000000
[ 1.491630] reg: 1302001c: 00000000
[ 1.477807] reg: 13020020: 00000000
[ 1.481517] reg: 13020024: 00000000
[ 1.485205] reg: 13020028: 00000000
[ 1.488893] reg: 1302002c: 00000000
[ 1.492581] reg: 13020030: 00000000
[ 1.484106] reg: 13020034: 00000000
[ 1.487817] reg: 13020038: 00000000
[ 1.491506] reg: 1302003c: 00000000
[ 1.495194] reg: 13020040: 00000000
[ 1.498883] reg: 13020044: 00000000
[ 1.485034] reg: 13020048: 00000000
[ 1.488741] reg: 1302004c: 00000000
[ 1.492429] reg: 13020050: 00000000
[ 1.496116] reg: 13020054: 00000000
[ 1.499805] reg: 13020058: 00000000
[ 1.485947] reg: 1302005c: 00000000
[ 1.489655] reg: 13020060: 00000000
[ 1.493343] reg: 13020064: 00000000
[ 1.497031] reg: 13020068: 00000000
[ 1.500720] reg: 1302006c: 00000000
[ 1.486861] reg: 13020070: 00000000
[ 1.490569] reg: 13020074: 00000000
[ 1.494257] reg: 13020078: 00000000
[ 1.497946] reg: 1302007c: 00000000
[ 1.501635] reg: 13020080: 00000000
[ 1.487806] reg: 13020084: 00000000
[ 1.491516] reg: 13020088: 00000000
[ 1.495203] reg: 1302008c: 00000000
[ 1.498892] reg: 13020090: 00000000
[ 1.502581] reg: 13020094: 00000000
[ 1.495343] reg: 13020098: 00000000
[ 1.499054] reg: 1302009c: 00000000
[ 1.502743] reg: 130200a0: 00000000
[ 1.506430] reg: 130200a4: 00000000
[ 1.510118] reg: 130200a8: 00000000
[ 1.496267] reg: 130200ac: 00000000
[ 1.499973] reg: 130200b0: 00000000
[ 1.503661] reg: 130200b4: 00000000
[ 1.507349] reg: 130200b8: 00000000
[ 1.511037] reg: 130200bc: 00000000
[ 1.497180] reg: 130200c0: 00000000
[ 1.500888] reg: 130200c4: 00000000
[ 1.504576] reg: 130200c8: 00000000
[ 1.508264] reg: 130200cc: 00000000
[ 1.511952] reg: 130200d0: 00000000
[ 1.498095] reg: 130200d4: 00000000
[ 1.501802] reg: 130200d8: 00000000
[ 1.505491] reg: 130200dc: 00000000
[ 1.509179] reg: 130200e0: 00000000
[ 1.512866] reg: 130200e4: 00000000
[ 1.499040] reg: 130200e8: 00000000
[ 1.502750] reg: 130200ec: 00000000
[ 1.506438] reg: 130200f0: 00000000
[ 1.510126] reg: 130200f4: 00000000
[ 1.513815] reg: 130200f8: 00000000
[ 1.499992] reg: 130200fc: 00000000
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