[Letux-kernel] Fwd: [PATCH 08/13] ARM: dts: omap5: Add DSP and IPU nodes
David Shah
dave at ds0.me
Tue Aug 18 10:17:16 CEST 2020
I believe this will also be useful to get the hardware video/encode working
again on OMAP5. This also appears to need some other modules for the IPC, but a
big part of it is a mostly-binary-blob firmware that runs on the Cortex-M4 cores
and communicates with the video blocks.
Something to look at once all the core features are working reliably.
Best
David
On Sat, 2020-08-15 at 08:47 +0200, H. Nikolaus Schaller wrote:
> Hi,
> I missed this patch on LKML and it may arrive as soon as v5.9.
> This is about making available the Cortex-M4 coprocessors (IPU) inside the
> OMAP5 chip which has lead to some dreams in the past what we could do with
> it...
> https://pyra-handheld.com/boards/threads/arm-m4-usage.82072/#post-1426526
>
> BR,
> Nikolaus
>
>
> > Anfang der weitergeleiteten Nachricht:
> >
> > Von: Suman Anna <s-anna at ti.com>
> > Betreff: [PATCH 08/13] ARM: dts: omap5: Add DSP and IPU nodes
> > Datum: 10. Juli 2020 um 01:19:49 MESZ
> > An: Tony Lindgren <tony at atomide.com>
> > Kopie: <linux-omap at vger.kernel.org>, <devicetree at vger.kernel.org>, <
> > linux-arm-kernel at lists.infradead.org>, Tero Kristo <t-kristo at ti.com>, Suman
> > Anna <s-anna at ti.com>
> >
> > OMAP5, like OMAP4, also has two remote processor subsystems,
> > DSP and IPU. The IPU subsystem though has dual Cortex-M4
> > processors instead of the dual Cortex-M3 processors in OMAP4,
> > but otherwise has almost the same set of features. Add the
> > DT nodes for these two processor sub-systems for all OMAP5
> > SoCs.
> >
> > The nodes have the 'iommus', 'clocks', 'resets', 'firmware' and
> > 'mboxes' properties added, and are disabled for now. The IPU node
> > has its L2 RAM memory specified through the 'reg' and 'reg-names'
> > properties. The DSP node doesn't have these since it doesn't have
> > any L2 RAM memories, but has an additional 'ti,bootreg' property
> > instead as it has a specific boot register that needs to be
> > programmed for booting.
> >
> > These nodes should be enabled as per the individual product
> > configuration in the corresponding board dts files.
> >
> > Signed-off-by: Suman Anna <s-anna at ti.com>
> > ---
> > arch/arm/boot/dts/omap5.dtsi | 23 +++++++++++++++++++++++
> > 1 file changed, 23 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> > index fb889c5b00c9..116150ded018 100644
> > --- a/arch/arm/boot/dts/omap5.dtsi
> > +++ b/arch/arm/boot/dts/omap5.dtsi
> > @@ -216,6 +216,29 @@ mmu_ipu: mmu at 0 {
> > };
> > };
> >
> > + dsp: dsp {
> > + compatible = "ti,omap5-dsp";
> > + ti,bootreg = <&scm_conf 0x304 0>;
> > + iommus = <&mmu_dsp>;
> > + resets = <&prm_dsp 0>;
> > + clocks = <&dsp_clkctrl OMAP5_MMU_DSP_CLKCTRL 0>;
> > + firmware-name = "omap5-dsp-fw.xe64T";
> > + mboxes = <&mailbox &mbox_dsp>;
> > + status = "disabled";
> > + };
> > +
> > + ipu: ipu at 55020000 {
> > + compatible = "ti,omap5-ipu";
> > + reg = <0x55020000 0x10000>;
> > + reg-names = "l2ram";
> > + iommus = <&mmu_ipu>;
> > + resets = <&prm_core 0>, <&prm_core 1>;
> > + clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>;
> > + firmware-name = "omap5-ipu-fw.xem4";
> > + mboxes = <&mailbox &mbox_ipu>;
> > + status = "disabled";
> > + };
> > +
> > dmm at 4e000000 {
> > compatible = "ti,omap5-dmm";
> > reg = <0x4e000000 0x800>;
> > --
> > 2.26.0
> >
>
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