[Letux-kernel] uart / w1 woes

[Andreas Kemnade]

> >>> And there is a side effect:
> >>> omap_hdq stops working, so battery current reading fails.  
> >> 
> >> That would be not so nice...
> >>   
> >>> Probably it does
> >>> not declare required clocks/resources properly (also CORE_48M_FCLK but via CORE_12M_FCLK).
> >>>   
> > 
> > So it is a bug somewhere. I guess understanding that gains valuable knowledge
> > about kernel and soc structure.  
> 
> it is imho part of the hwmods and the driver for ti clocks and DT.
> 

CM_AUTOIDLE1_CORE.AUTO_HDQ does the trick. Clearing that bit (before the first read
after uart suspend) and everything is ok.
With autosuspend for all uarts and a lot of debug output I get
still 30mA. So clearing that bit does not give up too much power saving.
Just played around with devmem2.

Next step: intense RTFM, understand that register fully and
convert that knowledge into a patch.

Regards,
Andreas
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