[Gta04-owner] GTA04 camera in VGA mode starts working
Andreas Kemnade
andreas at kemnade.info
Mon Nov 27 22:41:46 CET 2017
Hi,
On Mon, 27 Nov 2017 21:37:03 +0100
"H. Nikolaus Schaller" <hns at goldelico.com> wrote:
> >
> > ./camera-demo seems to work, at least with sxga,
> > colors are wrong, red is e.g. blue.
>
> Yes, this is a known bug with UYVY being interpreted as VYUY somewhere.
> There is a hack in the driver which makes it work, but it contradicts the
> data sheet (and other drivers).
>
> >
> > ./capture -d /dev/video2 (got that from camera-demo output)
> > [ 2662.126983] ov9655 1-0030: ov9655_get_format
> > [ 2662.131622] ov9655 1-0030: __ov9655_get_pad_format: pad=0 which=1 V4L2_SUBDE
> > [ 2662.141174] ov9655 1-0030: busfmt: h=1024 w=1280 code=8198 field=1 csp=8
> > VIDIOC_STREAMON error 22, Invalid argument
>
> The capture-demo does some camera-setup before, which is also required here.
> But the capture.c tool may also be broken now...
>
I ran camera-demo (which runs camera-setup) terminated it and then
started capture directly.
Now I tried a bit around:
iff --git a/Letux/root/capture.c b/Letux/root/capture.c
index 03a798982fba..2a24c86766ac 100644
--- a/Letux/root/capture.c
+++ b/Letux/root/capture.c
@@ -519,7 +519,7 @@ init_device (void)
fmt.fmt.pix.height = 1024;
// fmt.fmt.pix.pixelformat = V4L2_PIX_FMT_YUYV;
fmt.fmt.pix.pixelformat = V4L2_PIX_FMT_UYVY;
- fmt.fmt.pix.field = V4L2_FIELD_INTERLACED;
+ //fmt.fmt.pix.field = V4L2_FIELD_INTERLACED;
gets me a bit further. If I start ./capture -d /dev/video2
I get this:
# ./capture -d /dev/video2
[ 125.882812] ov9655 1-0030: ov9655_set_power on=1
[ 125.888946] ov9655 1-0030: __ov9655_set_power on=1
[ 126.005767] ov9655 1-0030: ov9655_reset
[ 126.010437] ov9655 1-0030: OV9655 read register 15 : 40
[ 126.018798] ov9655 1-0030: OV9655 read register 3c : 8c
[ 126.024414] ov9655 1-0030: ov9655_reset: output_drive 3
[ 126.030792] ov9655 1-0030: OV9655 read register 09 : 13
[ 126.036804] ov9655 1-0030: ov9655_reset: pclk_sample 1
[ 126.042633] ov9655 1-0030: OV9655 read register 15 : 40
[ 126.048675] ov9655 1-0030: ov9655_reset: vsync_active 1
[ 126.054565] ov9655 1-0030: OV9655 read register 15 : 40
[ 126.060699] ov9655 1-0030: ov9655_reset: hsync_active 0
[ 126.066955] ov9655 1-0030: OV9655 read register 15 : 40
[ 126.072540] ov9655 1-0030: ov9655_reset: pclk_delay 2
[ 126.078704] ov9655 1-0030: OV9655 read register 3a : 8c
[ 126.084289] ov9655 1-0030: ov9655_reset: clock_noncontinuous 0
[ 126.091430] ov9655 1-0030: OV9655 read register 15 : 40
[ 126.097442] ov9655 1-0030: ov9655_reset: slave_mode 0
[ 126.103179] ov9655 1-0030: OV9655 read register 15 : 40
[ 126.109191] ov9655 1-0030: ov9655_reset: data_active 1
[ 126.114685] ov9655 1-0030: ov9655_reset: bus_width 8
[ 126.120361] ov9655 1-0030: ov9655_s_ctrl 00980911
[ 126.125732] ov9655 1-0030: ov9655_s_ctrl: V4L2_CID_EXPOSURE 00008000
[ 126.132812] ov9655 1-0030: OV9655 read register a1 : 01
[ 126.138793] ov9655 1-0030: OV9655 write register a1 : 20
[ 126.144775] ov9655 1-0030: OV9655 write register 0f : 00
[ 126.151550] ov9655 1-0030: OV9655 read register 04 : 01
[ 126.157501] ov9655 1-0030: OV9655 write register 04 : 00
[ 126.163452] ov9655 1-0030: ov9655_s_ctrl 00980914
[ 126.168914] ov9655 1-0030: ov9655_s_ctrl: V4L2_CID_HFLIP 0
[ 126.175079] ov9655 1-0030: OV9655 read register 1e : 00
[ 126.181152] ov9655 1-0030: ov9655_s_ctrl 00980915
[ 126.186553] ov9655 1-0030: ov9655_s_ctrl: V4L2_CID_VFLIP 0
[ 126.192718] ov9655 1-0030: OV9655 read register 1e : 00
[ 126.198730] ov9655 1-0030: ov9655_s_ctrl 009f0903
[ 126.203643] ov9655 1-0030: ov9655_s_ctrl: V4L2_CID_TEST_PATTERN 0
[ 126.210845] ov9655 1-0030: OV9655 read register 0c : 00
[ 126.217102] ov9655 1-0030: OV9655 read register 8d : 00
[ 126.222686] ov9655 1-0030: ov9655_s_ctrl 00981902
[ 126.228149] ov9655 1-0030: ov9655_s_ctrl 00981903
[ 126.233093] ov9655 1-0030: ov9655_s_ctrl 00981904
[ 126.238494] ov9655 1-0030: ov9655_s_ctrl 00981905
[ 126.262390] ov9655 1-0030: ov9655_get_format
[ 126.267181] ov9655 1-0030: __ov9655_get_pad_format: pad=0 which=1 V4L2_SUBDE
[ 126.276641] ov9655 1-0030: busfmt: h=1024 w=1280 code=8198 field=1 csp=8
[ 126.284881] ov9655 1-0030: ov9655_get_format
[ 126.290130] ov9655 1-0030: __ov9655_get_pad_format: pad=0 which=1 V4L2_SUBDE
[ 126.299468] ov9655 1-0030: busfmt: h=1024 w=1280 code=8198 field=1 csp=8
[ 126.307006] ov9655 1-0030: ov9655_s_stream(1)
[ 126.311584] ov9655 1-0030: ov9655_set_params
[ 126.316528] ov9655 1-0030: OV9655 write register 0f : 40
[ 126.322540] ov9655 1-0030: OV9655 write register 3b : 05
[ 126.328979] ov9655 1-0030: OV9655 write register 40 : c0
[ 126.334899] ov9655 1-0030: busfmt: h=1024 w=1280 code=8198 field=1 csp=8
[ 126.342895] ov9655 1-0030: OV9655 read register 12 : 02
[ 126.349182] ov9655 1-0030: OV9655 read register 6b : 4a
[ 126.354766] ov9655 1-0030: OV9655 write register 11 : 00
[ 126.361145] ov9655 1-0030: OV9655 write register 36 : f9
[ 126.367462] ov9655 1-0030: OV9655 write register 69 : 02
[ 126.373779] ov9655 1-0030: OV9655 read register 8c : 0c
[ 126.379791] ov9655 1-0030: OV9655 write register a9 : 8d
[ 126.386474] ov9655 1-0030: OV9655 read register 41 : 40
[ 126.392059] ov9655 1-0030: OV9655 write register 17 : 19
[ 126.398803] ov9655 1-0030: OV9655 read register 32 : 84
[ 126.404388] ov9655 1-0030: OV9655 write register 18 : b9
[ 126.411132] ov9655 1-0030: OV9655 read register 32 : 84
[ 126.417083] ov9655 1-0030: OV9655 write register 19 : 00
[ 126.423431] ov9655 1-0030: OV9655 read register 03 : 00
[ 126.429412] ov9655 1-0030: OV9655 write register 1a : 80
[ 126.436035] ov9655 1-0030: OV9655 read register 03 : 00
[ 126.441619] ov9655 1-0030: format->code=00002006
[ 126.447296] ov9655 1-0030: OV9655 read register 0c : 00
[ 126.453277] ov9655 1-0030: OV9655 read register 12 : 02
[ 126.459564] ov9655 1-0030: OV9655 read register 3a : 8c
[ 126.465148] ov9655 1-0030: format->field=00000001
[ 126.471008] ov9655 1-0030: OV9655 read register 09 : 13
[ 126.476989] ov9655 1-0030: OV9655 write register 09 : 03
..[ 126.678283] omap3isp 480bc000.isp: CCDC won't become idle!
.VIDIOC_QBUF error 5, Input/output error
and the kernel hangs.
If I use camera-setup without camera-demo and start capture
-d /dev/video2 then, I get:
Device: /dev/video2
### starting capture in sxga mode ###
[ 791.885467] ov9655 1-0030: ov9655_set_power on=1
[ 791.890502] ov9655 1-0030: __ov9655_set_power on=1
[ 792.004913] ov9655 1-0030: ov9655_reset
[ 792.009552] ov9655 1-0030: OV9655 read register 15 : 40
[ 792.017944] ov9655 1-0030: OV9655 read register 3c : 8c
[ 792.023559] ov9655 1-0030: ov9655_reset: output_drive 3
[ 792.029968] ov9655 1-0030: OV9655 read register 09 : 13
[ 792.035949] ov9655 1-0030: ov9655_reset: pclk_sample 1
[ 792.041748] ov9655 1-0030: OV9655 read register 15 : 40
[ 792.047882] ov9655 1-0030: ov9655_reset: vsync_active 1
[ 792.053771] ov9655 1-0030: OV9655 read register 15 : 40
[ 792.059906] ov9655 1-0030: ov9655_reset: hsync_active 0
[ 792.066162] ov9655 1-0030: OV9655 read register 15 : 40
[ 792.071746] ov9655 1-0030: ov9655_reset: pclk_delay 2
[ 792.077911] ov9655 1-0030: OV9655 read register 3a : 8c
[ 792.083496] ov9655 1-0030: ov9655_reset: clock_noncontinuous 0
[ 792.090698] ov9655 1-0030: OV9655 read register 15 : 40
[ 792.096710] ov9655 1-0030: ov9655_reset: slave_mode 0
[ 792.102447] ov9655 1-0030: OV9655 read register 15 : 40
[ 792.108459] ov9655 1-0030: ov9655_reset: data_active 1
[ 792.113952] ov9655 1-0030: ov9655_reset: bus_width 8
[ 792.119689] ov9655 1-0030: ov9655_s_ctrl 00980911
[ 792.125030] ov9655 1-0030: ov9655_s_ctrl: V4L2_CID_EXPOSURE 00008000
[ 792.132110] ov9655 1-0030: OV9655 read register a1 : 01
[ 792.138122] ov9655 1-0030: OV9655 write register a1 : 20
[ 792.144042] ov9655 1-0030: OV9655 write register 0f : 00
[ 792.150848] ov9655 1-0030: OV9655 read register 04 : 01
[ 792.156799] ov9655 1-0030: OV9655 write register 04 : 00
[ 792.162750] ov9655 1-0030: ov9655_s_ctrl 00980914
[ 792.168182] ov9655 1-0030: ov9655_s_ctrl: V4L2_CID_HFLIP 0
[ 792.174743] ov9655 1-0030: OV9655 read register 1e : 00
[ 792.180358] ov9655 1-0030: ov9655_s_ctrl 00980915
[ 792.185821] ov9655 1-0030: ov9655_s_ctrl: V4L2_CID_VFLIP 0
[ 792.191986] ov9655 1-0030: OV9655 read register 1e : 00
[ 792.197998] ov9655 1-0030: ov9655_s_ctrl 009f0903
[ 792.202941] ov9655 1-0030: ov9655_s_ctrl: V4L2_CID_TEST_PATTERN 0
[ 792.210144] ov9655 1-0030: OV9655 read register 0c : 00
[ 792.216369] ov9655 1-0030: OV9655 read register 8d : 00
[ 792.221954] ov9655 1-0030: ov9655_s_ctrl 00981902
[ 792.227508] ov9655 1-0030: ov9655_s_ctrl 00981903
[ 792.232452] ov9655 1-0030: ov9655_s_ctrl 00981904
[ 792.237884] ov9655 1-0030: ov9655_s_ctrl 00981905
[ 792.261016] ov9655 1-0030: ov9655_get_format
[ 792.265747] ov9655 1-0030: __ov9655_get_pad_format: pad=0 which=1 V4L2_SUBDE
[ 792.275177] ov9655 1-0030: busfmt: h=1024 w=1280 code=8198 field=1 csp=8
[ 792.282379] ov9655 1-0030: ov9655_get_format
[ 792.287322] ov9655 1-0030: __ov9655_get_pad_format: pad=0 which=1 V4L2_SUBDE
[ 792.296539] ov9655 1-0030: busfmt: h=1024 w=1280 code=8198 field=1 csp=8
[ 792.303710] ov9655 1-0030: ov9655_s_stream(1)
[ 792.308685] ov9655 1-0030: ov9655_set_params
[ 792.314239] ov9655 1-0030: OV9655 write register 0f : 40
[ 792.320922] ov9655 1-0030: OV9655 write register 3b : 05
[ 792.327484] ov9655 1-0030: OV9655 write register 40 : c0
[ 792.333374] ov9655 1-0030: busfmt: h=1024 w=1280 code=8198 field=1 csp=8
[ 792.341461] ov9655 1-0030: OV9655 read register 12 : 02
[ 792.347778] ov9655 1-0030: OV9655 read register 6b : 4a
[ 792.353393] ov9655 1-0030: OV9655 write register 11 : 00
[ 792.359771] ov9655 1-0030: OV9655 write register 36 : f9
[ 792.366088] ov9655 1-0030: OV9655 write register 69 : 02
[ 792.372375] ov9655 1-0030: OV9655 read register 8c : 0c
[ 792.378387] ov9655 1-0030: OV9655 write register a9 : 8d
[ 792.385162] ov9655 1-0030: OV9655 read register 41 : 40
[ 792.390777] ov9655 1-0030: OV9655 write register 17 : 19
[ 792.397888] ov9655 1-0030: OV9655 read register 32 : 84
[ 792.403503] ov9655 1-0030: OV9655 write register 18 : b9
[ 792.410461] ov9655 1-0030: OV9655 read register 32 : 84
[ 792.416473] ov9655 1-0030: OV9655 write register 19 : 00
[ 792.422851] ov9655 1-0030: OV9655 read register 03 : 00
[ 792.428863] ov9655 1-0030: OV9655 write register 1a : 80
[ 792.435546] ov9655 1-0030: OV9655 read register 03 : 00
[ 792.441131] ov9655 1-0030: format->code=00002006
[ 792.446807] ov9655 1-0030: OV9655 read register 0c : 00
[ 792.452819] ov9655 1-0030: OV9655 read register 12 : 02
[ 792.459136] ov9655 1-0030: OV9655 read register 3a : 8c
[ 792.465057] ov9655 1-0030: format->field=00000001
[ 792.470397] ov9655 1-0030: OV9655 read register 09 : 13
[ 792.476379] ov9655 1-0030: OV9655 write register 09 : 03
.[ 792.612945] omap3isp 480bc000.isp: CCDC won't become idle!
.VIDIOC_QBUF error 5, Input/output error
[ 793.634429] omap3isp 480bc000.isp: Unable to stop OMAP3 ISP CCDC
[ 793.640808] ov9655 1-0030: ov9655_s_stream(0)
[ 793.646636] ov9655 1-0030: OV9655 read register 09 : 03
[ 793.652221] ov9655 1-0030: OV9655 write register 09 : 13
[ 793.674652] ov9655 1-0030: ov9655_set_power on=0
[ 793.679595] ov9655 1-0030: __ov9655_set_power on=0
Regards,
Andreas
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