[Letux-kernel] [PATCH RFC] dt: gta04: add pinctrl to mmc2 for remuxing dat1 to gpio

H. Nikolaus Schaller hns at goldelico.com
Fri Aug 12 18:53:11 CEST 2016


Hi Andreas,
I finally have checked and compared with

http://git.goldelico.com/?p=gta04-uboot.git;a=blob;f=board/goldelico/gta04/gta04.h;h=d81ca01e68c7f9380bc318ac8146483e9ec484bd;hb=refs/heads/master#l499

and the dm3730 data sheet, schematics and TRM.

> Am 11.08.2016 um 07:22 schrieb Andreas Kemnade <andreas at kemnade.info>:
> 
> The previous solution to have sdio irq on gta04 was to forcre fclk
> to be enabled all the time. According to the TRM of the DM3730 there
> should be a possibility to have some wakeup mechanism to wake up
> mmc2 to aute-enable the fclk and have the system react on sdio irqs
> even if fclk is off. But the omap-hsmmc code seems not to touch a
> register needed for it.
> As a first workaround this patch tries to remux the dat1 line to gpio
> in lower power states and use a gpio irq on that line which
> is intended as a solution for am33xx chips.
> The patch is based on https://lkml.org/lkml/2013/10/18/520
> It should be a better solution than
> f1a738b2c1dea1666bc221642632bd65031ef701
> but unfortunately does not work yet. Maybe somehow wrong
> pinctrl?
> 
> Signed-off-by: Andreas Kemnade <andreas at kemnade.info>
> ---
> arch/arm/boot/dts/omap3-gta04.dtsi | 37 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 37 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi
> index a5b4c63..46ec085 100644
> --- a/arch/arm/boot/dts/omap3-gta04.dtsi
> +++ b/arch/arm/boot/dts/omap3-gta04.dtsi
> @@ -252,6 +252,37 @@
> 		>;
> 	};
> 
> +	mmc2_pins: pinmux_mmc2_pins {
> +		pinctrl-single,pins = <
> +			/* sdmmc2_clk */
> +			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)

^^^ ok, PIN_INPUT_PULLUP means that input is enabled (and output is possible)
0x2158 is correct - means bit0..15 at 0x2158

> +			/* sdmmc2_cmd */
> +			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)

0x215a is correct - offset +2 means bit16..31 at 0x2158

> +			/* sdmmc2_dat0 */
> +			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)
> +			/* sdmmc2_dat1 */
> +			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)
> +			/* sdmmc2_dat2 */
> +			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)
> +			/* sdmmc2_dat3 */
> +			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)
> +			/* sdmmc2_dir_dat0 */
> +			OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT_PULLUP | MUX_MODE1)

ok, needs mode 1, register bits 0-15

> +			/* sdmmc2_dir_dat1 */
> +			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT_PULLUP | MUX_MODE1)
> +			/* sdmmc2_dir_cmd */
> +			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT_PULLUP | MUX_MODE1)
> +			/* sdmmc2_dir_clkin */
> +			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE1)

seems to be ok!

> +		>;
> +	};
> +
> +	mmc2_cirq_pin: pinmux_cirq_pin {
> +		pinctrl-single,pins = <
> +			/* MMC2_DAT1 as GPIO5_5 */
> +			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE4)

mmcdat1 is gpio133 and ball AH4 which is controlled by 215e.
And this is indeed bank 5 gpio 5.

So I have not found an issue in the basic pinmux.

One issue might be dir_dat1. Are we sure that the level shifter is controlled in "input" direction
so that the interrupt arrives from the module at the gpio? I have checked with the data sheet
that it should be "low":

	http://www.ti.com/lit/ds/symlink/sn74avca406l.pdf

We might need to do something but it might already be controlled correctly by the omap_hsmmc.

Now about switching states. I remember that there is a lot of locks and checks and almost
no "default" pinmux that you can assume - unless you do not specify anything. Then it is
inherited from U-Boot stage or last operation state.

Here is an example of pinmux that did work:

	http://git.goldelico.com/?p=gta04-kernel.git;a=blob;f=arch/arm/boot/dts/omap3-gta04.dtsi;h=aef0351be1dfc04b5e0809401589193126944ed6;hb=3097ee4a205a11f71e003b4526d35dc38d5d3582#l346

There are two uart2 pinmux states which define all relevant and the same pins.

	http://git.goldelico.com/?p=gta04-kernel.git;a=blob;f=arch/arm/boot/dts/omap3-gta04.dtsi;h=aef0351be1dfc04b5e0809401589193126944ed6;hb=3097ee4a205a11f71e003b4526d35dc38d5d3582#l310

Together with the (now abandoned) driver it did work.

Another area where we finally need such pinmux states is the hw-routing for audio:

	http://git.goldelico.com/?p=gta04-kernel.git;a=blob;f=arch/arm/boot/dts/omap3-gta04.dtsi;h=a5b4c631d58b2d3bc26e5a9de671ee4dc0bc1f7d;hb=refs/heads/letux-4.8-rc1#l870

So I would suggest that you try:

+	mmc2_pins: pinmux_mmc2_pins {
+		pinctrl-single,pins = <
+			/* sdmmc2_clk */
+			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)
+			/* sdmmc2_cmd */
+			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)
+			/* sdmmc2_dat0 */
+			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)
+			/* sdmmc2_dat1 */
+			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)
+			/* sdmmc2_dat2 */
+			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)
+			/* sdmmc2_dat3 */
+			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)
+			/* sdmmc2_dir_dat0 */
+			OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT_PULLUP | MUX_MODE1)
+			/* sdmmc2_dir_dat1 */
+			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT_PULLUP | MUX_MODE1)
+			/* sdmmc2_dir_cmd */
+			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT_PULLUP | MUX_MODE1)
+			/* sdmmc2_dir_clkin */
+			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE1)
+		>;
+	};
+
+	mmc2_pins_irq: pinmux_cirq_pin {
+		pinctrl-single,pins = <
+			/* sdmmc2_clk */
+			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)
+			/* sdmmc2_cmd */
+			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)
+			/* sdmmc2_dat0 */
+			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)
+			/* sdmmc2_dat1 as GPIO133 = 5_5 */
+			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE4)
+			/* sdmmc2_dat2 */
+			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)
+			/* sdmmc2_dat3 */
+			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)
+			/* sdmmc2_dir_dat0 */
+			OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT_PULLUP | MUX_MODE1)
+			/* sdmmc2_dir_dat1 */
+			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT_PULLUP | MUX_MODE1)
+	// optional:		OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLDOWN | MUX_MODE4)
+			/* sdmmc2_dir_cmd */
+			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT_PULLUP | MUX_MODE1)
+			/* sdmmc2_dir_clkin */
+			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE1)
+		>;
+	};
	backlight_pins: backlight_pins_pimnux {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20ba, MUX_MODE3)		/* gpt11/gpio57 */
@@ -528,9 +559,15 @@
};

&mmc2 {
+	pinctrl-names = "default", "active", "idle";
+	pinctrl-0 = <&mmc2_pins>;
+	pinctrl-1 = <&mmc2_pins>;
+	pinctrl-2 = <& mmc2_pins_irq >;
+	interrupts-extended = <&intc 86 &gpio5 5 0>;
	vmmc-supply = <&vaux4>;
	bus-width = <4>;
	ti,non-removable;
+	ti,quirk-swakeup-missing;
	mmc-pwrseq = <&wifi_pwrseq>;
	cap-power-off-card;	/* remove! */
};

> +		>;
> +	};
> 	backlight_pins: backlight_pins_pimnux {
> 		pinctrl-single,pins = <
> 			OMAP3_CORE1_IOPAD(0x20ba, MUX_MODE3)		/* gpt11/gpio57 */
> @@ -528,9 +559,15 @@
> };
> 
> &mmc2 {
> +	pinctrl-names = "default", "active", "idle";
> +	pinctrl-0 = <&mmc2_pins>;
> +	pinctrl-1 = <&mmc2_pins>;
> +	pinctrl-2 = <&mmc2_cirq_pin>;
> +	interrupts-extended = <&intc 86 &gpio5 5 0>;

any reason why you don't use

              interrupt-parent = <&gpio5>;
              interrupts = <5 IRQ_TYPE_EDGE_RISING>; /* GPIO_133 */


> 	vmmc-supply = <&vaux4>;
> 	bus-width = <4>;
> 	ti,non-removable;
> +	ti,quirk-swakeup-missing;
> 	mmc-pwrseq = <&wifi_pwrseq>;
> 	cap-power-off-card;	/* remove! */
> };
> -- 
> 2.1.4
> 
> __

BR,
Nikolaus




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